1// SPDX-License-Identifier: GPL-3.0-or-later
2
3#pragma once
4
5#include <mos/platform/platform.h>
6#include <mos/types.h>
7
8#define GDT_NULL 0x00
9#define GDT_SEGMENT 0x10
10#define GDT_PRESENT 0x80
11
12#define GDT_GRANULARITY_BYTE 0x40
13#define GDT_GRANULARITY_PAGE 0xC0
14
15#define GDT_SEGMENT_NULL 0x00
16
17#define GDT_SEGMENT_KCODE 0x10
18#define GDT_SEGMENT_KDATA 0x20
19#define GDT_SEGMENT_USERCODE 0x30
20#define GDT_SEGMENT_USERDATA 0x40
21#define GDT_SEGMENT_TSS 0x50
22
23#define GDT_ENTRY_COUNT 6
24
25typedef struct
26{
27 u32 limit_low : 16; //
28 u32 base_low : 24; //
29 u32 accessed : 1; //
30 u32 read_write : 1; // readable for code, writable for data
31 u32 conforming_expand_down : 1; // conforming for code, expand down for data
32 u32 executable : 1; // 1 for code, 0 for data
33 u32 code_data_segment : 1; // should be 1 for everything but TSS and LDT
34 u32 dpl : 2; // privilege level
35 u32 present : 1; //
36 u32 limit_high : 4; //
37 u32 available : 1; // only used in software; has no effect on hardware
38 u32 long_mode_code : 1; // long-mode code segment
39 u32 pm32_segment : 1; // 32-bit opcodes for code, uint32_t stack for data
40 u32 granularity : 1; // 1 to use 4k page addressing, 0 for byte addressing
41 u32 base_high : 8;
42 u32 base_veryhigh; // upper 32 bits of base address
43 u32 reserved;
44} __packed gdt_entry_t;
45
46MOS_STATIC_ASSERT(sizeof(gdt_entry_t) == 16, "gdt_entry_t is not 16 bytes");
47
48typedef struct
49{
50 u16 limit;
51 gdt_entry_t *base;
52} __packed gdt_ptr_t;
53
54MOS_STATIC_ASSERT(sizeof(gdt_ptr_t) == 2 + sizeof(void *), "gdt_ptr_t is not 6 bytes");
55
56typedef struct
57{
58 u32 reserved1;
59 u64 rsp0;
60 u64 rsp1;
61 u64 rsp2;
62 u64 reserved2;
63 u64 ist1;
64 u64 ist2;
65 u64 ist3;
66 u64 ist4;
67 u64 ist5;
68 u64 ist6;
69 u64 ist7;
70 u64 reserved3;
71 u16 reserved4;
72 u16 iomap;
73} __packed tss64_t;
74
75MOS_STATIC_ASSERT(sizeof(tss64_t) == 0x68, "tss64_t is not 0x68 bytes");
76
77typedef struct
78{
79 tss64_t tss __aligned(32);
80 gdt_entry_t gdt[GDT_ENTRY_COUNT] __aligned(32);
81 gdt_ptr_t gdt_ptr __aligned(32);
82} __packed x86_cpu_descriptor_t;
83
84extern PER_CPU_DECLARE(x86_cpu_descriptor_t, x86_cpu_descriptor);
85
86typedef struct
87{
88 u16 isr_low; // The lower 16 bits of the ISR's address
89 u16 segment; // The GDT segment selector that the CPU will load into CS before calling the ISR
90 u32 reserved : 8;
91 u32 type : 4; // The type of interrupt
92 u32 zero : 1;
93 u32 dpl : 2;
94 u32 present : 1;
95 u32 isr_high : 16; // The upper 16 bits of the ISR's address
96 u32 isr_veryhigh; // The upper 32 bits of the ISR's address
97 u32 reserved2;
98} __packed idt_entry_t;
99
100typedef struct
101{
102 u16 limit;
103 idt_entry_t *base;
104} __packed idtr_t;
105
106MOS_STATIC_ASSERT(sizeof(idt_entry_t) == 16, "idt_entry_t is not 16 bytes");
107
108MOS_STATIC_ASSERT(sizeof(idtr_t) == 2 + sizeof(void *), "idtr32_t is not 6 bytes");
109
110void x86_init_percpu_gdt(void);
111void x86_init_percpu_tss(void);
112void x86_init_percpu_idt(void);
113
114void x86_idt_init(void);
115
116// The following 5 symbols are defined in the descriptor_flush.asm file.
117extern void gdt_flush(gdt_ptr_t *gdt_ptr);
118extern void tss_flush(u32 tss_selector);
119extern void gdt_flush_only(gdt_ptr_t *gdt_ptr);
120